How do you grow 241 sub-layers of Si/SiGe on a 300 mm wafer — and keep every one of them pristine?

Semilab is happy to sponsor an upcoming Physics World WEBINAR exploring the epitaxial growth schemes powering the next generation of advanced CMOS and 3D DRAM devices.

The webinar, discussing Epitaxial Si/SiGe Multilayers for Novel Logic and Memory Devices, will be held on 6 May 2026 | 3 p.m. BST / 10 a.m. EDT, featuring Roger Loo, Principal Scientist at imec and Visiting Professor at Ghent University

Dr. Loo will walk through the evolution of MOS device architectures and what they demand from epitaxy — including Si/SiGe stacks for Nano-Sheet devices, 120-pair multilayers for 3D DRAM, and the dual-Ge-concentration stacks needed for monolithic CFET fabrication with gate-all-around nFETs and pFETs stacked on top of each other. Expect a close look at structural and optical material quality, plus how PL measurements verify defect-free growth.

A special highlight for us: room-temperature photoluminescence characterization performed on Semilab's EnVision PL tool can play a key role in verifying the quality of these complex epi stacks.

If you're working on logic, memory, or advanced semiconductor materials, this one is worth the hour.

Register HERE!