Deep-level transient spectroscopy (DLTS) is a promising tool in the realm of wafer inspection. It is an experimental method of studying electrically active defects in semiconductors. Researchers can utilize DLTS to establish fundamental defect parameters integral to “fingerprinting”. It excels in this arena due to its sensitivity. In fact, deep-level transient spectroscopy exceeds the sensitivity of most semiconductor diagnostic techniques. DLTS can detect impurities in silicon at a concentration of one part in 10¹² of the material’s host atoms. This is extremely beneficial for defect identification and analysis. It can also offer a comprehensive insight into the electronic states within the bandgap of semiconductors.

This article delves into the significance of DLTS for wafer inspection, its application areas, and the unique features it brings to the table.

Understanding DLTS in Wafer Characterization

At its core, DLTS measures capacitance and current transients. The system employs a lock-in integrator and a cryostat, both integral to the DLTS system. The capacitance transient, intriguingly, is generated by the sample itself and subsequently measured by the instrument. A temperature sweep is applied as the lock-in technique is employed, ensuring the instrument filters out any extraneous noise and accurately evaluates the transients.

The primary advantage of this method is the acquisition of transient data. This data provides invaluable information on contamination and defects, which is essential for wafer characterization. The sensitivity achieved in impurity detection is unparalleled, with the capability to detect below 2x10⁸ atoms/cm³. This is largely attributed to the exceptional signal-to-noise ratio of the main measurement unit.

DLTS Measurement Modes

1. Temperature/frequency scan: A foundational mode that assesses the sample across varying temperatures and frequencies.
2. Depth profiling: A detailed analysis of the sample's depth is offered.
3. CV characterization: Evaluates the capacitance-voltage characteristics of the sample.
4. Capture cross-section: Analyzes the cross-sectional area where electron capture occurs.
5. Optical injection: Introduces carriers into the sample using light.
6. Transient digitization: Converts the transient signal into a digital format for further analysis.

Applications and Use Cases

DLTS is applicable to many users, including wafer and EPI manufacturers, IC fabs, and research institutes. A notable use case is the detection of Fe contamination in Si. The Fe-B pair can be dissociated through heat treatment, leading to an increase in the Fe interstitial peak. Interestingly, this process is reversible. Allowing the sample to relax results in the peak diminishing.

Sample Specifications for DLTS

For optimal results, the characteristics of the sample are crucial. While the ideal sample's characteristics largely depend on the measurement's goal, some general conditions are universally applicable:

• The sample size should range between 1x1 and 10x10 mm, equipped with a Schottky contact or an asymmetrical p-n junction.
• The depletion region should not surpass the layer thickness.
• The contact size must exceed 0.05x0.05 mm.
• An Ohmic contact on the substrate is essential, and this substrate should possess low resistivity.

Limitations of DLTS in Wafer Inspection

While DLTS offers many advantages, it's essential to be aware of its limitations. The method is inherently destructive, necessitating sample preparation. The sample size is contingent on the cryostat, and the application's exact nature influences the cryostat's temperature range.

Deep-level transient spectroscopy has cemented its position as an indispensable tool in wafer inspection. Its ability to provide contamination analysis with unparalleled sensitivity makes it a favored choice for professionals in the semiconductor industry. At Semilab, we pride ourselves on offering state-of-the-art DLTS solutions tailored to your needs. To explore the full potential of Semilab's DLTS for your wafer characterization needs, visit our dedicated DLTS page. Together, let's push the boundaries of semiconductor research and development.